Readme.txt for 9X02STEP.ZIP

9X02STEP.ZIP contains full-size color versions of the illustrations from the article "Software-Defined Hardware for Software-Defined Radios," by John B. Stephensen, KD6OZH (QEX, Sep/Oct 2002, pp 41-50). At the time this was posted, the author's e-mail was kd6ozh@arrl.net.

Figure Captions
Fig 1-A SPLD macrocell (source: Lattice Semiconductor Corporation).
Fig 2-A 16V8 SPLD programmable AND-array (source: Lattice Semiconductor Corporation).
Fig 3-A typical CPLD block diagram (source: Altera Corporation).
Fig 4-A typical CPLD macrocell logic block (source: Altera Corporation).
Fig 5-A typical CPLD I/O control block (source: Lattice Semiconductor Corporation).
Fig 6-CPLD design software for a PC.
Fig 7-Phase-detector schematic input.
Fig 8-Reference and VCO divider schematic input.
Fig 9-A top-level schematic for a custom PLL.
Fig 10-AT40K FPGA architecture (source: Atmel Corporation).
Fig 11-AT40K core cell (source: Atmel Corporation).
Fig 12-Direct cell-to-cell connections (source: Atmel Corporation).
Fig 13-AT40K busses (source: Atmel Corporation).
Fig 14-Core-cell configurations (source: Atmel Corporation).
Fig 15-AT40K RAM cell (source: Atmel Corporation).
Fig 16-AT40K RAM cell bus usage (source: Atmel Corporation).
Fig 17-AT40K FPGA I/O (source: Atmel Corporation).
Fig 18-Schematic diagram and equivalent Verilog description (source: Doulos CBT).
Fig 19-Interface description in Atmel MGL (source: Atmel Corporation).
Fig 20-Component instantiation in Atmel MGL (source: Atmel Corporation).
Fig 21-Routing in Atmel MGL (source: Atmel Corporation).
Fig 22-FPGA design software showing four cells and interconnection.
Fig 23-An Atmel FPSLIC (source: Atmel Corporation).
Fig 24-The AVR RISC MCU and peripherals (source: Atmel Corporation).
Fig 25-FPSLIC design software main screen.
Fig 26-DSP filter design software.
Fig 27-The upper right corner of CORDIC quad serial arithmetic unit.
Fig 28-A serial-parallel multiplier-accumulator unit.

73, Bob, KU7G
5:02 PM 08/13/2002

Robert J. Schetgen, KU7G/1				Senior Assistant Technical Editor			
American Radio Relay League, 225 Main St, Newington, CT 06111-1494
ph: 860-594-0277 (direct)					fax: 860-594-0259	
e-mail: rschetgen@arrl.org  

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